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| تعداد نشریات | 38 |
| تعداد شماره‌ها | 1,240 |
| تعداد مقالات | 8,993 |
| تعداد مشاهده مقاله | 7,843,341 |
| تعداد دریافت فایل اصل مقاله | 4,705,057 |
تقویت‌کننده کم‌نویز فراپهن باند با استفاده از تکنیک معکوس‌کننده با پیک‌زنی القایی | ||
| الکترومغناطیس کاربردی | ||
| دوره 10، شماره 1 - شماره پیاپی 24، فروردین 1401، صفحه 109-120 اصل مقاله (1.29 M) | ||
| نوع مقاله: مقاله پژوهشی | ||
| نویسندگان | ||
| مهدی بکرانی* 1؛ محمد مهدی تسخیری2؛ سیدعلی آسایش3 | ||
| 1استادیار، دانشگاه صنعتی قم، قم، ایران | ||
| 2استادیار، گروه مخابرات و الکترونیک، دانشکده برق و کامپیوتر، دانشگاه صنعتی قم، قم ، ایران | ||
| 3کارشناسی ارشد، دانشگاه صنعتی قم، قم، ایران | ||
| تاریخ دریافت: 10 شهریور 1400، تاریخ بازنگری: 14 اسفند 1400، تاریخ پذیرش: 29 دی 1400 | ||
| چکیده | ||
| در این مقاله، یک تقویت‌کننده کم‌نویز در باند فرکانسی فراپهن GHz 3/1-10/6 با استفاده از تکنولوژی CMOS 130 nm طراحی شده است. در این مدار از تکنیک سورس تبهگنی برای گسترش پهنای باند و ایجاد تطبیق ورودی و از تکنیک استفاده مجدد جریان برای دستیابی به بهره بالا استفاده می‌شود. همچنین از آنجا که اغلب تکنیک‌های تطبیق امپدانس خروجی موجب تضعیف بهره یا خط‌سانی می‌شود، از تکنیک معکوس‌کننده با پیک‌زنی القایی استفاده شده است تا علاوه‌بر فراهم نمودن تطبیق امپدانس 50 اهمی در خروجی، بهره و خط‌سانی را نیز بهبود دهد. این تکنیک رفتار هارمونیک سوم را بهبود و بهره را dB 2/7 افزایش داده است. مدار پیشنهادی دارای S11 کمتر از S22، dB -1/9 کمتر از dB -10، ماکزیمم بهرهdB 19/6، عدد نویز بین 7/dB 2-2، توان مصرفی mw 28 و IIP3 با مقدار dBm -3/5 می‌باشد. همچنین ابعاد جانشانی طرح برابر µm 701/4 × µm 991/84 است. مزایای ساختار پیشنهادی در مقایسه با ساختارهای فراپهن با تکنولوژی یکسان، در بهره بالاتر، عدد نویز کمتر و تطبیق بهتر خروجی می‌باشد. | ||
| کلیدواژه‌ها | ||
| تقویت‌کننده کم‌نویز؛ تبهگنی سورس؛ استفاده مجدد از جریان؛ پیک‌زنی القایی؛ خط‌سانی | ||
| عنوان مقاله [English] | ||
| The Presentation of a Low Noise UWB Amplifier Using an Inverter with Inductive Peaking Technique | ||
| نویسندگان [English] | ||
| Mehdi Bekrani1؛ mohammad mahdi taskhiri2؛ Seyed Ali Asayesh3 | ||
| 1Assistant Professor, Qom University of Technology, Qom, Iran | ||
| 2Assistant Professor, Department of Telecommunications and Electronics, Faculty of Electrical and Computer Engineering, Qom University of Technology, Qom, Iran | ||
| 3M.Sc., Qom University of Technology, Qom, Iran | ||
| چکیده [English] | ||
| In this paper, a 3.1 to 10.6 GHz low noise amplifier is designed using the 130 nm CMOS technology. In this circuit, the source degeneration technique is employed to increase the bandwidth and achieve input impedance matching. In addition, a current reuse technique is employed to achieve a high gain. Since most output impedance matching techniques degrade the gain or linearity, an inverter along with an inductive peaking technique is used to provide the output impedance matching of 50 ohms and to improve both the linearity and gain. This technique enhances the third harmonic behavior and increases the gain by 2.7 dB. The proposed circuit achieves S11 of less than - 9.1dB, S22 of less than -10 dB, the maximum gain of 19.7 dB, NF of 2 to 2.7 dB, and IIP3 of -3.5 dBm. Moreover, the power consumption of the proposed circuit is 28 mw and the core layout size is 991.84 μm×701.4 μm. The advantages of the proposed circuit over UWB structures with the same technology are higher gain, lower noise figure (NF), and better output matching. | ||
| کلیدواژه‌ها [English] | ||
| Low noise amplifier, source degeneration, current reuse, inductive peaking, linearity | ||
| مراجع | ||
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آمار تعداد مشاهده مقاله: 1,018 تعداد دریافت فایل اصل مقاله: 1,077 |
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